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» Direct Nonlinear Order Reduction with Variational Analysis
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ICCAD
2003
IEEE
161views Hardware» more  ICCAD 2003»
14 years 4 months ago
A General S-Domain Hierarchical Network Reduction Algorithm
This paper presents an efficient method to reduce complexities of a linear network in s-domain. The new method works on circuit matrices directly and reduces the circuit complexi...
Sheldon X.-D. Tan
ASPDAC
2005
ACM
131views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Analysis of buffered hybrid structured clock networks
- This paper presents a novel approach for fast transient analysis of buffered hybrid structured clock networks. The new method applies structure reduction and relaxed hierarchical...
Yi Zou, Qiang Zhou, Yici Cai, Xianlong Hong, Sheld...
VLDB
2000
ACM
229views Database» more  VLDB 2000»
13 years 11 months ago
Local Dimensionality Reduction: A New Approach to Indexing High Dimensional Spaces
Many emerging application domains require database systems to support efficient access over highly multidimensional datasets. The current state-of-the-art technique to indexing hi...
Kaushik Chakrabarti, Sharad Mehrotra
ICCAD
2007
IEEE
125views Hardware» more  ICCAD 2007»
14 years 4 months ago
A methodology for timing model characterization for statistical static timing analysis
While the increasing need for addressing process variability in sub-90nm VLSI technologies has sparkled a large body of statistical timing and optimization research, the realizati...
Zhuo Feng, Peng Li
ICIP
2007
IEEE
14 years 1 months ago
A Novel Kernel Discriminant Analysis for Face Verification
In this paper a novel non-linear subspace method for face verification is proposed. The problem of face verification is considered as a two-class problem (genuine versus imposto...
Georgios Goudelis, Stefanos Zafeiriou, Anastasios ...