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SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
GECCO
2004
Springer
145views Optimization» more  GECCO 2004»
14 years 24 days ago
Search Based Automatic Test-Data Generation at an Architectural Level
Abstract. The need for effective testing techniques for architectural level descriptions is widely recognised. However, due to the variety of domain-specific architectural descript...
Yuan Zhan, John A. Clark
CASES
2001
ACM
13 years 11 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
ATVA
2005
Springer
202views Hardware» more  ATVA 2005»
14 years 29 days ago
Model Checking Real Time Java Using Java PathFinder
Abstract. The Real Time Specification for Java (RTSJ) is an augmentation of Java for real time applications of various degrees of hardness. The central features of RTSJ are real t...
Gary Lindstrom, Peter C. Mehlitz, Willem Visser
SAG
2004
Springer
14 years 23 days ago
A Framework for the Design and Reuse of Grid Workflows
Grid workflows can be seen as special scientific workflows involving high performance and/or high throughput computational tasks. Much work in grid workflows has focused on improvi...
Ilkay Altintas, Adam Birnbaum, Kim Baldridge, Wibk...