Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
Stephen Somogyi, Thomas F. Wenisch, Anastasia Aila...
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
William Enck, Kevin R. B. Butler, Thomas Richardso...
Increased market dynamics, shorter product lifecycles and a higher customer involvement in product design have caused great changes to competitive conditions and many companies ar...
Thomas Knothe, Timo Kahl, Dieter Boell, Kristof Sc...
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Y...
—This paper discusses the design and implementation of an ultra low power embedded GPS receiver node for use in remote monitoring situations where battery life is of the utmost i...