3346 search results - page 194 / 670 » Distributed Caching Platforms |
HPCC
2009
Springer
14 years 26 days ago
2009
Springer
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
HPCA
2000
IEEE
14 years 20 days ago
2000
IEEE
Memorylatency isbecominganincreasingly importantperformance bottleneck, especially in multiprocessors. One technique for tolerating memory latency is multithreading, whereby we sw...
ICDCS
2000
IEEE
14 years 19 days ago
2000
IEEE
In light of advances in processor and networking technology, especially the emergenceof networkattached disks,the traditional clientserver architecture of file systems has become...
ICPP
1998
IEEE
14 years 15 days ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
APPT
2009
Springer
14 years 7 days ago
2009
Springer
Abstract. In many-core CMP architectures, the cache coherence protocol is a key component since it can add requirements of area and power consumption to the final design and, there...