Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
In this paper we develop, implement and evaluate an approach to quickly reassign resources for a virtualized utility computing platform. The approach provides this platform agilit...
Wei Zhang, Hangwei Qian, Craig E. Wills, Michael R...
The programming and retasking of sensor nodes could benefit greatly from the use of a virtual machine (VM) since byte code is compact, can be loaded on demand, and interpreted on...
In multi-hop wireless networks, random network coding represents the general design principle of transmitting random linear combinations of blocks in the same “batch” to downs...