Sciweavers

271 search results - page 53 / 55
» Distributed Link Scheduling for TDMA Mesh Networks
Sort
View
SPAA
2004
ACM
14 years 26 days ago
Lower bounds for graph embeddings and combinatorial preconditioners
Given a general graph G, a fundamental problem is to find a spanning tree H that best approximates G by some measure. Often this measure is some combination of the congestion and...
Gary L. Miller, Peter C. Richter
PDP
2011
IEEE
12 years 11 months ago
Energy-Aware Task Allocation for Network-on-Chip Based Heterogeneous Multiprocessor Systems
—Energy-efficiency is becoming one of the most critical issues in embedded system design. In Network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consump...
Jia Huang, Christian Buckl, Andreas Raabe, Alois K...
HPDC
2007
IEEE
14 years 1 months ago
A fast topology inference: a building block for network-aware parallel processing
Adapting to the network is the key to achieving high performance for communication-intensive applications, including scientific computing, data intensive computing, and multicast...
Tatsuya Shirai, Hideo Saito, Kenjiro Taura
HPCN
2000
Springer
13 years 11 months ago
A Java-Based Parallel Programming Support Environment
The Java programming language and environment is stimulating new research activities in many areas of computing, not the least of which is parallel computing. Parallel techniques ...
Kenneth A. Hawick, Heath A. James
DAC
1997
ACM
13 years 11 months ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...