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ISHPC
1999
Springer
14 years 1 months ago
Utilization of Cache Area in On-Chip Multiprocessor
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Hitoshi Oi, N. Ranganathan
CLUSTER
2004
IEEE
14 years 16 days ago
Improved message logging versus improved coordinated checkpointing for fault tolerant MPI
Fault tolerance is a very important concern for critical high performance applications using the MPI library. Several protocols provide automatic and transparent fault detection a...
Pierre Lemarinier, Aurelien Bouteiller, Thomas H&e...
IEEEPACT
2009
IEEE
13 years 6 months ago
Cache Sharing Management for Performance Fairness in Chip Multiprocessors
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Xing Zhou, Wenguang Chen, Weimin Zheng
PDP
2011
IEEE
13 years 15 days ago
Quantifying Thread Vulnerability for Multicore Architectures
Abstract—Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently, mu...
Isil Oz, Haluk Rahmi Topcuoglu, Mahmut T. Kandemir...
ICDCS
2009
IEEE
14 years 3 months ago
Towards Optimal Resource Utilization in Heterogeneous P2P Streaming
Though plenty of research has been conducted to improve Internet P2P streaming quality perceived by endusers, little has been known about the upper bounds of achievable performanc...
Dongyu Liu, Fei Li, Songqing Chen