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ICS
2004
Tsinghua U.
14 years 23 days ago
CQoS: a framework for enabling QoS in shared caches of CMP platforms
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
Ravi R. Iyer
ISCA
2010
IEEE
240views Hardware» more  ISCA 2010»
14 years 14 days ago
Modeling critical sections in Amdahl's law and its implications for multicore design
This paper presents a fundamental law for parallel performance: it shows that parallel performance is not only limited by sequential code (as suggested by Amdahl’s law) but is a...
Stijn Eyerman, Lieven Eeckhout
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 14 days ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
HT
2010
ACM
14 years 14 days ago
Parallel browsing behavior on the web
Parallel browsing describes a behavior where users visit Web pages in multiple concurrent threads. Web browsers explicitly support this by providing tabs. Although parallel browsi...
Jeff Huang, Ryen W. White
CHI
1996
ACM
13 years 11 months ago
Email Overload: Exploring Personal Information Management of Email
Email is one of the most successful computer applications yet devised. Our empirical data show however, that although email was originally designed as a communications application...
Steve Whittaker, Candace L. Sidner