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ICS
1999
Tsinghua U.
14 years 1 months ago
Adapting cache line size to application behavior
A cache line size has a signi cant e ect on missrate and memorytra c. Today's computers use a xed line size, typically 32B, which may not be optimalfor a given application. O...
Alexander V. Veidenbaum, Weiyu Tang, Rajesh K. Gup...
ICPP
1991
IEEE
14 years 20 days ago
Cache Coherence on a Slotted Ring
-- The Express Ring is a new architecture under investigation at the University of Southern California. Its main goal is to demonstrate that a slotted unidirectional ring with very...
Luiz André Barroso, Michel Dubois
COOPIS
1998
IEEE
14 years 1 months ago
Towards an Inductive Design of Distributed Object Oriented Databases
Cooperative Information Systems (CIS) often consist of applications that access shared resources such as databases. Since centralized systems may have a great impact on the system...
Fernanda Araujo Baião, Marta Mattoso, Gerso...
ICPPW
1999
IEEE
14 years 1 months ago
Caching and Multicasting in DBS Systems
The use of Caching and Multicasting has been studied extensively in the context of terrestrial networks. However, the use of these technologies in a Direct Broadcast Satellite(DBS...
Mingyan Liu, Manish Karir, John S. Baras
IPPS
1999
IEEE
14 years 1 months ago
NWCache: Optimizing Disk Accesses via an Optical Network/Write Cache Hybrid
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
Enrique V. Carrera, Ricardo Bianchini