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EUROPAR
1999
Springer
14 years 1 months ago
Annotated Memory References: A Mechanism for Informed Cache Management
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...
IEEEPACT
2009
IEEE
13 years 6 months ago
Cache Sharing Management for Performance Fairness in Chip Multiprocessors
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Xing Zhou, Wenguang Chen, Weimin Zheng
HPCA
2011
IEEE
13 years 19 days ago
ACCESS: Smart scheduling for asymmetric cache CMPs
In current Chip-multiprocessors (CMPs), a significant portion of the die is consumed by the last-level cache. Until recently, the balance of cache and core space has been primari...
Xiaowei Jiang, Asit K. Mishra, Li Zhao, Ravishanka...
TWC
2008
105views more  TWC 2008»
13 years 8 months ago
Selection Cooperation in Multi-Source Cooperative Networks
In a cooperative network with multiple potential relays and multiple simultaneous transmissions, we present selection cooperation wherein each source pairs with a single "best...
Elzbieta Beres, Raviraj Adve
CAISE
1999
Springer
14 years 1 months ago
Design of Object Caching in a CORBA OTM System
Abstract. CORBA Object Transaction Monitors (OTM) refer to a middleware technology that enable the building of transactional, objectoriented information systems running in distribu...
Thomas Sandholm, Stefan Tai, Dirk Slama, Eamon Wal...