7379 search results - page 1214 / 1476 » Distributed vector architectures |
143
Voted
VLSID
2005
IEEE
16 years 3 months ago
2005
IEEE
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuits, capturing both spatio-temporal correlations at internal nodes and higher ord...
105
Voted
VLSID
2005
IEEE
16 years 3 months ago
2005
IEEE
Two Simple structures of low-power Dual-edge triggered Static Pulsed Flip-Flops (DSPFF) are presented in this paper. They are composed of a dualedge pulse generator and a static f...
96
Voted
HPCA
2008
IEEE
16 years 3 months ago
2008
IEEE
This paper presents FlexiTaint, a hardware accelerator for dynamic taint propagation. FlexiTaint is implemented as an in-order addition to the back-end of the processor pipeline, ...
109
Voted
HPCA
2008
IEEE
16 years 3 months ago
2008
IEEE
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
118
click to vote
HPCA
2008
IEEE
16 years 3 months ago
2008
IEEE
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...