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DSN
2004
IEEE
13 years 11 months ago
Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline
The progression of implementation technologies into the sub-100 nanometer lithographies renew the importance of understanding and protecting against single-event upsets in digital...
Nicholas J. Wang, Justin Quek, Todd M. Rafacz, San...
JVCIR
2006
88views more  JVCIR 2006»
13 years 7 months ago
Morphological wavelet-based stereo image coders
In this paper, we propose a family of novel stereoscopic image coders based on morphological coding and a block-based disparity compensation algorithm. The proposed schemes employ...
J. N. Ellinas, M. S. Sangriotis
ICDCN
2011
Springer
12 years 11 months ago
Load Balanced Scalable Byzantine Agreement through Quorum Building, with Full Information
We address the problem of designing distributed algorithms for large scale networks that are robust to Byzantine faults. We consider a message passing, full information model: the ...
Valerie King, Steven Lonargan, Jared Saia, Amitabh...
AAAI
2006
13 years 9 months ago
Sample-Efficient Evolutionary Function Approximation for Reinforcement Learning
Reinforcement learning problems are commonly tackled with temporal difference methods, which attempt to estimate the agent's optimal value function. In most real-world proble...
Shimon Whiteson, Peter Stone
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 28 days ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...