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IROS
2009
IEEE
121views Robotics» more  IROS 2009»
14 years 2 months ago
Understanding of positioning skill based on feedforward / feedback switched dynamical model
— To realize the harmonious cooperation with the operator, the man-machine cooperative system must be designed so as to accommodate with the characteristics of the operator’s s...
Hiroyuki Okuda, Hidenori Takeuchi, Shinkichi Inaga...
CODES
2002
IEEE
14 years 11 days ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
EIT
2008
IEEE
13 years 9 months ago
Design and analysis of efficient reconfigurable wavelet filters
Abstract--Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power ...
Amit Pande, Joseph Zambreno
ERSA
2006
91views Hardware» more  ERSA 2006»
13 years 8 months ago
Intrinsic Embedded Hardware Evolution of Block-based Neural Networks
- An intrinsic embedded online evolution system has been designed using Block-based neural networks and implemented on Xilinx VirtexIIPro FPGAs. The designed network can dynamicall...
Saumil Merchant, Gregory D. Peterson, Seong Kong
VLSISP
2008
123views more  VLSISP 2008»
13 years 7 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...