207 search results - page 3 / 42 » Dynamic Cache Switching in Reconfigurable Embedded Systems |
ICS
2005
Tsinghua U.
14 years 26 days ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
ASWEC
2007
IEEE
13 years 11 months ago
2007
IEEE
Influence control is a very challenging issue in dynamic reconfiguration and still not well addressed in the literature. This paper argues that dynamic reconfiguration influences s...
ICPP
2002
IEEE
14 years 9 days ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
ISMVL
2005
IEEE
14 years 28 days ago
2005
IEEE
In this paper, we propose three novel cache models using Multiple-Valued Logic (MVL) paradigm to reduce the cache data storage area and cache energy consumption for embedded syste...