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IEEEPACT
1999
IEEE
15 years 8 months ago
A Cost-Effective Clustered Architecture
In current superscalar processors, all floating-point resources are idle during the execution of integer programs. As previous works show, this problem can be alleviated if the fl...
Ramon Canal, Joan-Manuel Parcerisa, Antonio Gonz&a...
ISCAS
1999
IEEE
77views Hardware» more  ISCAS 1999»
15 years 8 months ago
A low-voltage translinear second-order quadrature oscillator
This paper describes the design of a low-voltage translinear second-order quadrature oscillator. The circuit is a direct implementation of a nonlinear second-order state-space desc...
Wouter A. Serdijn, J. Mulder, Michiel H. L. Kouwen...
CSMR
1998
IEEE
15 years 8 months ago
Protection Reconfiguration for Reusable Software
Secure distributed applications often include code to authenticate users, verify access rights, and establish secure communication channels between software components (e.g., clie...
Christian Damsgaard Jensen, Daniel Hagimont
ICS
1999
Tsinghua U.
15 years 8 months ago
Classifying load and store instructions for memory renaming
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary ...
IPPS
1998
IEEE
15 years 8 months ago
Design and Implementation of a Parallel I/O Runtime System for Irregular Applications
In this paper we present the design, implementation and evaluation of a runtime system based on collective I/O techniques for irregular applications. We present two models, namely...
Jaechun No, Sung-Soon Park, Jesús Carretero...