Researchers in transactional memory (TM) have proposed open nesting as a methodology for increasing the concurrency of transactional programs. The idea is to ignore "low-leve...
Thread-level speculation (TLS) is a technique that allows parts of a sequential program to be executed in parallel. TLS ensures the parallel program's behaviour remains true ...
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
: The aim of this paper is to demonstrate the feasibility of authenticated throughput-ecient routing in an unreliable and dynamically changing synchronous network in which the majo...
The Drosophila gene expression pattern images document the spatial and temporal dynamics of gene expression and they are valuable tools for explicating the gene functions, interac...
Shuiwang Ji, Lei Yuan, Ying-Xin Li, Zhi-Hua Zhou, ...