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GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
14 years 25 days ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 2 months ago
A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management
An energy efficient object recognition processor is proposed for real-time visual applications. Its energy efficiency is improved by lowering average power consumption while susta...
Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim...
ICDCS
2010
IEEE
13 years 9 months ago
Mistral: Dynamically Managing Power, Performance, and Adaptation Cost in Cloud Infrastructures
—Server consolidation based on virtualization is a key ingredient for improving power efficiency and resource utilization in cloud computing infrastructures. However, to provide...
Gueyoung Jung, Matti A. Hiltunen, Kaustubh R. Josh...
CHES
2008
Springer
146views Cryptology» more  CHES 2008»
13 years 9 months ago
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration
Dynamically reconfigurable systems are known to have many advantages such as area and power reduction. The drawbacks of these systems are the reconfiguration delay and the overhead...
Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhe...
VLSID
2005
IEEE
170views VLSI» more  VLSID 2005»
14 years 1 months ago
A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications
Abstract—Integrated power supplies are critical building blocks in stateof-the-art portable applications, where they efficiently and accurately transform a battery supply into va...
Biranchinath Sahu, Gabriel A. Rincón-Mora