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» Dynamic Logic With Possible World
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UAI
2008
13 years 9 months ago
Dyna-Style Planning with Linear Function Approximation and Prioritized Sweeping
We consider the problem of efficiently learning optimal control policies and value functions over large state spaces in an online setting in which estimates must be available afte...
Richard S. Sutton, Csaba Szepesvári, Alborz...
CADE
2007
Springer
14 years 8 months ago
Combination Methods for Satisfiability and Model-Checking of Infinite-State Systems
Manna and Pnueli have extensively shown how a mixture of first-order logic (FOL) and discrete Linear time Temporal Logic (LTL) is sufficient to precisely state verification problem...
Silvio Ghilardi, Enrica Nicolini, Silvio Ranise, D...
ARCS
2005
Springer
14 years 1 months ago
Reusable Design of Inter-chip Communication Interfaces for Next Generation of Adaptive Computing Systems
Abstract. The SoC (System-on-Chip) technology is used in small and flexible consumer electronic devices. SoCs include one or more microcontroller, memory, programmable logic, and ...
Vincent Kotzsch, Jörg Schneider, Günther...
CEEMAS
2005
Springer
14 years 1 months ago
How Our Beliefs Contribute to Interpret Actions
Abstract. In update logic the interpretation of an action is often assumed to be independent from the agents’ beliefs about the situation (see [BMS04] or [Auc05]). In this paper ...
Guillaume Aucher
FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
13 years 11 months ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...