473 search results - page 37 / 95 » Dynamic Memory Design for Low Data-Retention Power |
MICRO
1997
IEEE
14 years 27 days ago
1997
IEEE
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
MONET
2008
13 years 8 months ago
2008
This paper investigates a distributed and adaptive approach to manage spectrum usage in dynamic spectrum access networks. While previous works focus on centralized provisioning, w...
ARVLSI
2001
IEEE
14 years 11 days ago
2001
IEEE
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
ISLPED
2005
ACM
14 years 2 months ago
2005
ACM
The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniproc...
SCOPES
2007
Springer
14 years 2 months ago
2007
Springer
Embedded consumer devices are increasing their capabilities and can now implement new multimedia applications reserved only for powerful desktops a few years ago. These applicatio...