473 search results - page 45 / 95 » Dynamic Memory Design for Low Data-Retention Power |
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
PPOPP
2009
ACM
14 years 9 months ago
2009
ACM
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
CODES
2010
IEEE
13 years 6 months ago
2010
IEEE
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
SIGMETRICS
2008
ACM
13 years 8 months ago
2008
ACM
Thermal management of DRAM memory has become a critical issue for server systems. We have done, to our best knowledge, the first study of software thermal management for memory su...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...