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» Dynamic Memory Design for Low Data-Retention Power
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CSE
2009
IEEE
14 years 1 days ago
Rotation Scheduling and Voltage Assignment to Minimize Energy for SoC
— Low energy consumption is a critical issue in embedded systems design. As the technology feature sizes of SoC (Systems on Chip) become smaller and smaller, the percentage of le...
Meikang Qiu, Laurence Tianruo Yang, Edwin Hsing-Me...
SPAA
2005
ACM
14 years 2 months ago
Dynamic circular work-stealing deque
The non-blocking work-stealing algorithm of Arora, Blumofe, and Plaxton (henceforth ABP work-stealing) is on its way to becoming the multiprocessor load balancing technology of ch...
David Chase, Yossi Lev
ICASSP
2010
IEEE
13 years 9 months ago
Simulating dynamic communication systems using the core functional dataflow model
The latest communication technologies invariably consist of modules with dynamic behavior. There exists a number of design tools for communication system design with their foundat...
Nimish Sane, Chia-Jui Hsu, José Luis Pino, ...
NOCS
2007
IEEE
14 years 3 months ago
A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing
Dynamic routing can substantially enhance the quality of service for multiprocessor communication, and can provide intelligent adaptation of faulty links during run time. Implemen...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
TVLSI
2002
100views more  TVLSI 2002»
13 years 8 months ago
Architectural strategies for low-power VLSI turbo decoders
Abstract--The use of "turbo codes" has been proposed for several applications, including the development of wireless systems, where highly reliable transmission is requir...
Guido Masera, M. Mazza, Gianluca Piccinini, F. Vig...