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ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
11 years 10 months ago
BlockChop: Dynamic squash elimination for hybrid processor architecture
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
Jason Mars, Naveen Kumar
MICRO
2010
IEEE
175views Hardware» more  MICRO 2010»
13 years 6 months ago
Efficient Selection of Vector Instructions Using Dynamic Programming
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
Rajkishore Barik, Jisheng Zhao, Vivek Sarkar
CORR
2010
Springer
177views Education» more  CORR 2010»
13 years 5 months ago
Dynamic Scheduling of Skippable Periodic Tasks with Energy Efficiency in Weakly Hard Real-Time System
Energy consumption is a critical design issue in real-time systems, especially in battery- operated systems. Maintaining high performance, while extending the battery life between...
Santhi Baskaran, P. Thambidurai
CORR
2010
Springer
123views Education» more  CORR 2010»
13 years 3 months ago
Equilibria of Dynamic Games with Many Players: Existence, Approximation, and Market Structure
In this paper we study stochastic dynamic games with many players that are relevant for a wide range of social, economic, and engineering applications. The standard solution conce...
Sachin Adlakha, Ramesh Johari, Gabriel Y. Weintrau...
IMCSIT
2010
13 years 2 months ago
Multi-level Parallelization with Parallel Computational Services in BeesyCluster
The paper presents a concept, implementation and real examples of dynamic parallelization of computations using services derived from MPI applications deployed in the BeesyCluster ...
Pawel Czarnul