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» Dynamic Power Management Using Data Buffers
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HPCA
2012
IEEE
13 years 10 months ago
Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chi
Lowering supply voltage is one of the most effective techniques for reducing microprocessor power consumption. Unfortunately, at low voltages, chips are very sensitive to process ...
Timothy N. Miller, Xiang Pan, Renji Thomas, Naser ...
IEEEPACT
2009
IEEE
15 years 4 days ago
Cache Sharing Management for Performance Fairness in Chip Multiprocessors
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Xing Zhou, Wenguang Chen, Weimin Zheng
TCAD
2008
88views more  TCAD 2008»
15 years 2 months ago
Self-Adaptive Data Caches for Soft-Error Reliability
Soft-error induced reliability problems have become a major challenge in designing new generation microprocessors. Due to the on-chip caches' dominant share in die area and tr...
Shuai Wang, Jie S. Hu, Sotirios G. Ziavras
SIGMETRICS
2010
ACM
177views Hardware» more  SIGMETRICS 2010»
15 years 7 months ago
Managing the cost, energy consumption, and carbon footprint of internet services
The large amount of energy consumed by Internet services represents significant and fast-growing financial and environmental costs. Increasingly, services are exploring dynamic ...
Kien Le, Ozlem Bilgir, Ricardo Bianchini, Margaret...
DASFAA
2009
IEEE
253views Database» more  DASFAA 2009»
15 years 5 months ago
Implementing and Optimizing Fine-Granular Lock Management for XML Document Trees
Abstract. Fine-grained lock protocols with lock modes and lock granules adjusted to the various XML processing models, allow for highly concurrent transaction processing on XML tre...
Sebastian Bächle, Theo Härder, Michael P...