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» Dynamic Processor Allocation in Hypercube Computers
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ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Fault tolerant nanoelectronic processor architectures
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
APCSAC
2006
IEEE
14 years 1 months ago
Issues and Support for Dynamic Register Allocation
Abstract. Post-link and dynamic optimizations have become important to achieve program performance. A major challenge in post-link and dynamic optimizations is the acquisition of r...
Abhinav Das, Rao Fu, Antonia Zhai, Wei-Chung Hsu
ASAP
2006
IEEE
97views Hardware» more  ASAP 2006»
14 years 1 months ago
Dynamic-SIMD for lens distortion compensation
An increasing computational demand is placed on the image processing capacity of current and future smart cameras. SIMD processor architectures provide an efficient solution becau...
Bart Mesman, Hamed Fatemi, Henk Corporaal, Twan Ba...
SIROCCO
2000
13 years 9 months ago
Cooperative computing with fragmentable and mergeable groups
ABSTRACT: This work considers the problem of performing a set of N tasks on a set of P cooperating message-passing processors (P N). The processors use a group communication servi...
Chryssis Georgiou, Alexander A. Shvartsman
ECRTS
2007
IEEE
14 years 1 months ago
WCET-Directed Dynamic Scratchpad Memory Allocation of Data
Many embedded systems feature processors coupled with a small and fast scratchpad memory. To the difference with caches, allocation of data to scratchpad memory must be handled by...
Jean-François Deverge, Isabelle Puaut