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ECRTS
2010
IEEE
13 years 8 months ago
Making DRAM Refresh Predictable
Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Sched...
Balasubramanya Bhat, Frank Mueller
HPDC
2010
IEEE
13 years 8 months ago
Biocompute: towards a collaborative workspace for data intensive bio-science
The explosion of data in the biological community demands the development of more scalable and flexible portals for bioinformatic computation. To address this need, we put forth c...
Rory Carmichael, Patrick Braga-Henebry, Douglas Th...
SIGMETRICS
2002
ACM
13 years 7 months ago
Full-system timing-first simulation
Computer system designers often evaluate future design alternatives with detailed simulators that strive for functional fidelity (to execute relevant workloads) and performance fi...
Carl J. Mauer, Mark D. Hill, David A. Wood
HPCA
2012
IEEE
12 years 2 months ago
System-level implications of disaggregated memory
Recent research on memory disaggregation introduces a new architectural building block—the memory blade—as a cost-effective approach for memory capacity expansion and sharing ...
Kevin T. Lim, Yoshio Turner, Jose Renato Santos, A...
ISCA
2012
IEEE
208views Hardware» more  ISCA 2012»
11 years 9 months ago
Harmony: Collection and analysis of parallel block vectors
Efficient execution of well-parallelized applications is central to performance in the multicore era. Program analysis tools support the hardware and software sides of this effor...
Melanie Kambadur, Kui Tang, Martha A. Kim