157 search results - page 29 / 32 » Dynamic Voltage and Cache Reconfiguration for Low Power |
CGO
2006
IEEE
14 years 1 months ago
2006
IEEE
Software prefetching has been demonstrated as a powerful technique to tolerate long load latencies. However, to be effective, prefetching must target the most critical (frequently...
CAL
2008
13 years 7 months ago
2008
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
ISPASS
2008
IEEE
14 years 1 months ago
2008
IEEE
The evolution of microprocessors has been hindered by their increasing power consumption and the heat generation speed on-die. High temperature impairs the processor’s reliabili...
CODES
2009
IEEE
13 years 8 months ago
2009
IEEE
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Future multicore processors will be more susceptible to a variety of hardware failures. In particular, intermittent faults, caused in part by manufacturing, thermal, and voltage v...