65 search results - page 7 / 13 » Dynamic power-performance adaptation of parallel computation... |
JSA
2010
13 years 2 months ago
2010
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
EH
1999
IEEE
13 years 12 months ago
1999
IEEE
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
IPPS
2002
IEEE
14 years 18 days ago
2002
IEEE
Power management is critical to power-constrained real-time systems. In this paper, we present a dynamic power management algorithm. Unlike other approaches that focus on the trad...
APPT
2007
Springer
14 years 1 months ago
2007
Springer
It is a great challenge to map network processing tasks to processing resources of advanced network processors, which are heterogeneous and multi-threading multiprocessor System-on...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...