84 search results - page 12 / 17 » Dynamic run-time architecture techniques for enabling contin... |
ICCAD
2006
IEEE
14 years 6 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
ISPASS
2005
IEEE
14 years 3 months ago
2005
IEEE
Simulation-based microarchitecture research is often hindered by the slow speed of simulators. In this work, we propose a novel statistical technique to identify highly representa...
ASPDAC
2008
ACM
13 years 11 months ago
2008
ACM
In this paper, we present the complete design and architectural details of MAIZEROUTER. MAIZEROUTER reflects a significant leap in progress over existing publicly available routing...
MICRO
2009
IEEE
14 years 4 months ago
2009
IEEE
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
EUROGP
2005
Springer
14 years 3 months ago
2005
Springer
Abstract. Wireless sensor networks (WSNs) are medium scale manifestations of a paintable or amorphous computing paradigm. WSNs are becoming increasingly important as they attain gr...