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PLDI
1999
ACM
13 years 12 months ago
Enhanced Code Compression for Embedded RISC Processors
This paper explores compiler techniques for reducing the memory needed to load and run program executables. In embedded systems, where economic incentives to reduce both ram and r...
Keith D. Cooper, Nathaniel McIntosh
SASP
2008
IEEE
164views Hardware» more  SASP 2008»
14 years 2 months ago
AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications
This paper proposes an energy efficient processor which can be used as a design alternative for the dynamic voltage scaling (DVS) processors in embedded system design. The proces...
Tohru Ishihara, Seiichiro Yamaguchi, Yuriko Ishito...
RTAS
1996
IEEE
13 years 11 months ago
Efficient worst case timing analysis of data caching
Recent progress in worst case timing analysis of programs has made it possible to perform accurate timing analysis of pipelined execution and instruction caching, which is necessa...
Sung-Kwan Kim, Sang Lyul Min, Rhan Ha
ICCS
2003
Springer
14 years 24 days ago
Method Call Acceleration in Embedded Java Virtual Machines
Object oriented languages, in particular Java, use a frequent dynamic dispatch mechanism to search for the definition of an invoked method. A method could be defined in more than...
Mourad Debbabi, M. M. Erhioui, Lamia Ketari, Nadia...
SAMOS
2007
Springer
14 years 1 months ago
Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors
When peak performance is unnecessary, Dynamic Voltage Scaling (DVS) can be used to reduce the dynamic power consumption of embedded multiprocessors. In future technologies, however...
Pepijn J. de Langen, Ben H. H. Juurlink