69 search results - page 7 / 14 » Dynamic thread assignment on heterogeneous multiprocessor ar... |
KBSE
2003
IEEE
14 years 28 days ago
2003
IEEE
Applications built in a strongly decoupled, eventbased interaction style have many commendable characteristics, including ease of dynamic configuration, accommodation of platform ...
CF
2009
ACM
14 years 2 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
CF
2009
ACM
14 years 2 months ago
2009
ACM
The exponential growth of databases that contains biological information (such as protein and DNA data) demands great efforts to improve the performance of computational platforms...
DSN
2007
IEEE
14 years 2 months ago
2007
IEEE
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...