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JAR
2007
132views more  JAR 2007»
15 years 3 months ago
Visualizing SAT Instances and Runs of the DPLL Algorithm
SAT-solvers have turned into essential tools in many areas of applied logic like, for example, hardware verification or satisfiability checking modulo theories (SMT). And althoug...
Carsten Sinz
VLSISP
2002
87views more  VLSISP 2002»
15 years 3 months ago
A 16-Bit by 16-Bit MAC Design Using Fast 5: 3 Compressor Cells
3:2 counters and 4:2 compressors have been widely used for multiplier implementations. In this paper, a fast 5:3 compressor is derived for high-speed multiplier implementations. Th...
Ohsang Kwon, Kevin J. Nowka, Earl E. Swartzlander ...
ENTCS
2008
90views more  ENTCS 2008»
15 years 3 months ago
Formal Verification of Websites
In this paper, a model for websites is presented. The model is well-suited for the formal verification of dynamic as well as static properties of the system. A website is defined ...
Sonia Flores, Salvador Lucas, Alicia Villanueva
FLAIRS
2009
15 years 1 months ago
Supporting Uncertainty and Inconsistency in Semantic Web Applications
Ensuring the consistency and completeness of Semantic Web ontologies is practically impossible, because of their scale and highly dynamic nature. Many web applications, therefore,...
Neli P. Zlatareva
CDC
2010
IEEE
272views Control Systems» more  CDC 2010»
14 years 11 months ago
Node capture attacks in wireless sensor networks: A system theoretic approach
In this paper we address the problem of physical node capture attacks in wireless sensor networks and provide a control theoretic framework to model physical node capture, cloned n...
Tamara Bonaci, Linda Bushnell, Radha Poovendran