40 search results - page 6 / 8 » Dynamic zero compression for cache energy reduction |
CASES
2007
ACM
13 years 11 months ago
2007
ACM
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
VEE
2006
ACM
14 years 1 months ago
2006
ACM
During recent years, microprocessor energy consumption has been surging and efforts to reduce power and energy have received a lot of attention. At the same time, virtual executio...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
Dictionary code compression is a technique where long instructions in the memory are replaced with shorter code words used as index in a table to look up the original instructions...