186 search results - page 19 / 38 » Dynamically Reconfiguring Processor Resources to Reduce Powe... |
ISPASS
2005
IEEE
14 years 1 months ago
2005
IEEE
Today’s general-purpose processors are increasingly using multithreading in order to better leverage the additional on-chip real estate available with each technology generation...
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
ICSE
2009
IEEE-ACM
14 years 2 months ago
2009
IEEE-ACM
Minimizing the computing infrastructure (such as processors) in a distributed real-time embedded (DRE) system deployment helps reduce system size, weight, power consumption, and c...