This paper explores the possibility of using the paradigm of Dynamic Logic (DL) to formalise information states and update processes on information states. In particular, we prese...
We motivate and study a generic relaxation of correctness of reactive and concurrent systems with respect to a temporal specification. We define a system to be fairly correct if...
We explain the raison d’ˆetre and basic ideas of input/output logic, sketching the central elements with pointers to other publications for detailed developments. The motivation...
We define regular expressions for unranked trees (actually, ordered sequences of unranked trees, called forests). These are compared to existing regular expressions for trees. On ...
Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...