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FPGA
2007
ACM
163views FPGA» more  FPGA 2007»
14 years 2 months ago
Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
Jason Cong, Kirill Minkovich
WSC
2008
13 years 10 months ago
Architecture for modeling, simulation, and execution of PLC based manufacturing system
In this paper, we propose an integrated architecture for modeling, simulation, and execution of PLC (Programmable Logic Controller) based manufacturing system. The main objective ...
Devinder Thapa, Chang Mok Park, Kwan Hee Han, Sang...
MOBIHOC
2008
ACM
14 years 8 months ago
Improving sensor network immunity under worm attacks: a software diversity approach
Because of cost and resource constraints, sensor nodes do not have a complicated hardware architecture or operating system to protect program safety. Hence, the notorious buffer-o...
Yi Yang, Sencun Zhu, Guohong Cao
ISCAS
2006
IEEE
94views Hardware» more  ISCAS 2006»
14 years 2 months ago
Relaxed tree search MIMO signal detection algorithm design and VLSI implementation
Abstract— This paper presents an implementation-oriented breadthfirst tree search MIMO detector design solution. Techniques at algorithm and VLSI architecture levels are develop...
Sizhong Chen, Tong Zhang, M. Goel
DAC
1997
ACM
14 years 20 days ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas