333 search results - page 50 / 67 » EXACT: algorithm and hardware architecture for an improved A... |
SBACPAD
2007
IEEE
14 years 1 months ago
2007
IEEE
Multi-dimensional imaging techniques involve the processing of high resolution images commonly used in medical, civil and remote-sensing applications. A barrier commonly encounter...
DAC
2009
ACM
13 years 11 months ago
2009
ACM
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
ISMVL
2005
IEEE
14 years 1 months ago
2005
IEEE
As logic device sizes shrink towards the nanometer scale, a number of important physical limits threaten to soon halt further improvements in computer performance per unit cost. H...
CF
2004
ACM
14 years 25 days ago
2004
ACM
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...