1209 search results - page 48 / 242 » Effective bandwidths with priorities |
CORR
2011
Springer
13 years 2 months ago
2011
Springer
Modern high-end machines feature multiple processor packages, each of which contains multiple independent cores and integrated memory controllers connected directly to dedicated ph...
PADS
2004
ACM
14 years 1 months ago
2004
ACM
An important question for network simulation is what level of detail is required to obtain a desired level of accuracy. While in some networks, the level of detail is an open rese...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
In this paper we analytically propose an alternative approach to achieve better fairness in scheduling mechanisms which could provide better quality of service particularly for re...
ICS
2004
Tsinghua U.
14 years 1 months ago
2004
Tsinghua U.
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...