As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
Enterprise level web proxies relay world-wide web traffic between private networks and the Internet. They improve security, save network bandwidth, and reduce network latency. Wh...
Carlos Maltzahn, Kathy J. Richardson, Dirk Grunwal...
We present a framework for integrated scheduling of continuous media (CM) and other applications. The framework, called ARC scheduling, consists of a rate-controlled on-line CPU sc...
This paper introduces an efficient numerical algorithm for transient analysis of deterministic and stochastic Petri nets (DSPNs) and other discrete-event stochastic systems with ...
Hoon Choi, Vidyadhar G. Kulkarni, Kishor S. Trived...