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TC
2008
13 years 7 months ago
Converting to and from Dilated Integers
Abstract-- Dilated integers form an ordered group of the cartesian indices into a d-dimensional array represented in Morton order. Efficient implementations of its operations can b...
Rajeev Raman, David S. Wise
SODA
1994
ACM
88views Algorithms» more  SODA 1994»
13 years 9 months ago
Optimal Prediction for Prefetching in the Worst Case
Response time delays caused by I/O are a major problem in many systems and database applications. Prefetching and cache replacement methods are attracting renewed attention because...
P. Krishnan, Jeffrey Scott Vitter
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
13 years 2 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman
CODES
2004
IEEE
13 years 11 months ago
Dynamic overlay of scratchpad memory for energy minimization
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
Manish Verma, Lars Wehmeyer, Peter Marwedel
DCOSS
2008
Springer
13 years 9 months ago
An Information Theoretic Framework for Field Monitoring Using Autonomously Mobile Sensors
We consider a mobile sensor network monitoring a spatio-temporal field. Given limited caches at the sensor nodes, the goal is to develop a distributed cache management algorithm to...
Hany Morcos, George Atia, Azer Bestavros, Ibrahim ...