1156 search results - page 43 / 232 » Efficient Barriers for Distributed Shared Memory Computers |
HIPC
2007
Springer
14 years 4 months ago
2007
Springer
Traditional directory-based cache coherence protocols suffer from long-latency cache misses as a consequence of the indirection introduced by the home node, which must be accessed...
IPPS
2000
IEEE
14 years 3 months ago
2000
IEEE
Only a handful of fundamental mechanisms for synchronizing the access of concurrent threads to shared memory are widely implemented and used. These include locks, condition variab...
HPCA
1999
IEEE
14 years 3 months ago
1999
IEEE
Previous simulators for shared-memory architectures have imposed a large tradeoff between simulation accuracy and speed. Most such simulators model simple processors that do not e...
IPPS
1999
IEEE
14 years 3 months ago
1999
IEEE
Parallel programming models should attempt to satisfy two conflicting goals. On one hand, they should hide architectural details so that algorithm designers can write simple, port...
EUROPAR
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. Profiling is often the method of choice for performance analysis of parallel applications due to its low overhead and easily comprehensible results. However, a disadvanta...