Sciweavers

778 search results - page 23 / 156
» Efficient Code Generation for Automatic Parallelization and ...
Sort
View
PC
2010
101views Management» more  PC 2010»
13 years 2 months ago
An efficient parallel implementation of the MSPAI preconditioner
We present an efficient implementation of the Modified SParse Approximate Inverse (MSPAI) preconditioner. MSPAI generalizes the class of preconditioners based on Frobenius norm mi...
Thomas Huckle, A. Kallischko, A. Roy, M. Sedlacek,...
PPOPP
1999
ACM
14 years 7 days ago
Automatic Parallelization of Divide and Conquer Algorithms
Divide and conquer algorithms are a good match for modern parallel machines: they tend to have large amounts of inherent parallelism and they work well with caches and deep memory...
Radu Rugina, Martin C. Rinard
CORR
2007
Springer
154views Education» more  CORR 2007»
13 years 8 months ago
Application of a design space exploration tool to enhance interleaver generation
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
Cyrille Chavet, Philippe Coussy, Pascal Urard, Eri...
CASES
2009
ACM
14 years 2 months ago
Optimal loop parallelization for maximizing iteration-level parallelism
This paper solves the open problem of extracting the maximal number of iterations from a loop that can be executed in parallel on chip multiprocessors. Our algorithm solves it opt...
Duo Liu, Zili Shao, Meng Wang, Minyi Guo, Jingling...
ICCAD
2002
IEEE
152views Hardware» more  ICCAD 2002»
14 years 4 months ago
Efficient instruction encoding for automatic instruction set design of configurable ASIPs
Application-specific instructions can significantly improve the performance, energy, and code size of configurable processors. A common approach used in the design of such instruc...
Jong-eun Lee, Kiyoung Choi, Nikil Dutt