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ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
14 years 1 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
ISPAN
2002
IEEE
14 years 2 months ago
Building Ontology for Optimization and Composition of Parallel JavaBean Programs
Abstract— In this paper, we propose an ontology specification for JavaBean programs, the object component model of Java. Our specification is written using the DAML+OIL languag...
Cheng-Wei Chen, Chung-Kai Chen, Jenq Kuen Lee
LCTRTS
2010
Springer
13 years 11 months ago
An efficient code update scheme for DSP applications in mobile embedded systems
DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advanta...
Weijia Li, Youtao Zhang
IPPS
2010
IEEE
13 years 7 months ago
Hybrid MPI/Pthreads parallelization of the RAxML phylogenetics code
Abstract--A hybrid MPI/Pthreads parallelization was implemented in the RAxML phylogenetics code. New MPI code was added to the existing Pthreads production code to exploit parallel...
Wayne Pfeiffer, Alexandros Stamatakis
LCPC
2005
Springer
14 years 2 months ago
Analytic Models and Empirical Search: A Hybrid Approach to Code Optimization
Compilers employ system models, sometimes implicitly, to make code optimization decisions. These models are analytic; they reflect their implementor’s understanding and beliefs ...
Arkady Epshteyn, María Jesús Garzar&...