778 search results - page 85 / 156 » Efficient Code Generation for Automatic Parallelization and ... |
DAC
2010
ACM
14 years 19 days ago
2010
ACM
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
WWW
2009
ACM
14 years 10 months ago
2009
ACM
In this paper we present an approach of generating Cascading Style Sheet documents automatically if the desired effect on the content elements is specified. While a Web user agent...
ICPPW
2005
IEEE
14 years 2 months ago
2005
IEEE
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
ICSE
2007
IEEE-ACM
14 years 9 months ago
2007
IEEE-ACM
The investigation of a software system prior to a modification task often constitutes an important fraction of the overall effort associated with the task. We present Suade, an Ec...
DAC
2010
ACM
14 years 1 months ago
2010
ACM
Clock skew optimization continues to be an important concern in circuit designs. To overcome the influence caused by PVT variations, the automatic skew synchronization scheme can ...