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EUROPAR
2010
Springer
13 years 8 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
TVLSI
2008
121views more  TVLSI 2008»
13 years 7 months ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna
PDP
2009
IEEE
14 years 2 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
SAC
2008
ACM
13 years 7 months ago
Continuous k-dominant skyline computation on multidimensional data streams
Skyline queries are important due to their usefulness in many application domains. However, by increasing the number of attributes, the probability that a tuple dominates another ...
Maria Kontaki, Apostolos N. Papadopoulos, Yannis M...
BIOCOMP
2006
13 years 9 months ago
PAC: Progressive Alignment with Consensus Sequences
Computation of multiple sequence alignments is one of the major open problems in computational molecular biology. The purpose of this study was to provide a new method, PAC (Progre...
Ke Liu, Mansur H. Samadzadeh