Sciweavers

283 search results - page 11 / 57
» Efficient FPGA hardware development: A multi-language approa...
Sort
View
FPL
2006
Springer
127views Hardware» more  FPL 2006»
13 years 11 months ago
On-FPGA Communication Architectures and Design Factors
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
14 years 1 months ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek
JIRS
2007
108views more  JIRS 2007»
13 years 7 months ago
Task-based Hardware Reconfiguration in Mobile Robots Using FPGAs
This paper presents a methodology for the realization of intelligent, task-based reconfiguration of the computational hardware for mobile robot applications. Task requirements are ...
Sesh Commuri, V. Tadigotla, L. Sliger
FPL
2000
Springer
116views Hardware» more  FPL 2000»
13 years 11 months ago
FPGA Implementation of a Prototype WDM On-Line Scheduler
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling techn...
Winnie W. Cheng, Steven J. E. Wilton, Babak Hamidz...
ERSA
2006
133views Hardware» more  ERSA 2006»
13 years 9 months ago
An FPGA based Co-Design Architecture for MIMO Lattice Decoders
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
Cao Liang, Jing Ma, Xin-Ming Huang