286 search results - page 52 / 58 » Efficient Hardware Architectures for Modular Multiplication ... |
DELTA
2004
IEEE
13 years 11 months ago
2004
IEEE
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
ACMMSP
2004
ACM
14 years 28 days ago
2004
ACM
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
CEE
2007
13 years 7 months ago
2007
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...
JCM
2008
13 years 7 months ago
2008
In this paper, we present a new simulation platform for complex, radio standard spanning mobile Ad Hoc networks. SimANet - Simulation Platform for Ambient Networks - allows the coe...