2620 search results - page 11 / 524 » Efficient Hardware Voxelization |
FSE
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. We present a fast involutional block cipher optimized for reconfigurable hardware implementations. ICEBERG uses 64-bit text blocks and 128-bit keys. All components are in...
DSD
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, we present an efficient hardware architecture for real-time implementation of intra prediction algorithm used in H.264 / MPEG4 Part 10 video coding standard. The ha...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
JSA
2007
13 years 7 months ago
2007
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
ISSS
2000
IEEE
13 years 11 months ago
2000
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...