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» Efficient Hardware Voxelization
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ICCAD
2007
IEEE
234views Hardware» more  ICCAD 2007»
15 years 8 months ago
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors
Abstract: Polynomial computations over fixed-size bitvectors are found in many practical datapath designs. For efficient RTL synthesis, it is important to identify good decompositi...
Sivaram Gopalakrishnan, Priyank Kalla, M. Brandon ...
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
15 years 8 months ago
BioRoute: a network-flow based routing algorithm for digital microfluidic biochips
Due to the recent advances in microfluidics, digital microfluidic biochips are expected to revolutionize laboratory procedures. One critical problem for biochip synthesis is the dr...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
HOTOS
2009
IEEE
15 years 8 months ago
Operating Systems Should Provide Transactions
Operating systems can efficiently provide system transactions to user applications, in which user-level processes can execute a series of system calls atomically and in isolation ...
Donald E. Porter, Emmett Witchel
ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
15 years 8 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
ASAP
2004
IEEE
102views Hardware» more  ASAP 2004»
15 years 8 months ago
A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks
The Compaan compiler automatically derives a Process Network (PN) description from an application written in Matlab. The basic element of a PN is a Producer/Consumer (P/C) pair. F...
Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere