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» Efficient Hardware Voxelization
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ASPDAC
2004
ACM
79views Hardware» more  ASPDAC 2004»
15 years 8 months ago
NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO
Abstract--A parasitic-aware RF synthesis tool based on a nondominated sorting genetic algorithm (NSGA) is introduced. The NSGA-based optimizer casts the design problem as a multi-o...
Min Chu, David J. Allstot, Jeffrey M. Huard, Kim Y...
ATS
2004
IEEE
93views Hardware» more  ATS 2004»
15 years 8 months ago
Hybrid BIST Test Scheduling Based on Defect Probabilities
1 This paper describes a heuristic for system-on-chip test scheduling in an abort-on-fail context, where the test is terminated as soon as a defect is detected. We consider an hybr...
Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
ATS
2004
IEEE
87views Hardware» more  ATS 2004»
15 years 8 months ago
Low Power BIST with Smoother and Scan-Chain Reorder
In this paper, we propose a low-power testing methodology for the scan-based BIST. A smoother is included in the test pattern generator (TPG) to reduce average power consumption d...
Nan-Cheng Lai, Sying-Jyan Wang, Yu-Hsuan Fu
141
Voted
ATVA
2004
Springer
138views Hardware» more  ATVA 2004»
15 years 8 months ago
Providing Automated Verification in HOL Using MDGs
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
Tarek Mhamdi, Sofiène Tahar
CAV
2004
Springer
108views Hardware» more  CAV 2004»
15 years 8 months ago
Functional Dependency for Verification Reduction
Abstract. The existence of functional dependency among the state variables of a state transition system was identified as a common cause of inefficient BDD representation in formal...
Jie-Hong Roland Jiang, Robert K. Brayton