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CHES
2004
Springer
106views Cryptology» more  CHES 2004»
15 years 7 months ago
XTR Implementation on Reconfigurable Hardware
Abstract. Recently, Lenstra and Verheul proposed an efficient cryptosystem called XTR. This system represents elements of F p6 with order dividing p2 -p+1 by their trace over Fp2 ....
Eric Peeters, Michael Neve, Mathieu Ciet
ICONIP
2008
15 years 5 months ago
A Novel Approach for Hardware Based Sound Classification
Several applications would emerge from the development of efficient and robust sound classification systems able to identify the nature of non-speech sound sources. This paper prop...
Mauricio Kugler, Victor Alberto Parcianello Benso,...
IJHPCA
2006
122views more  IJHPCA 2006»
15 years 4 months ago
A New Hardware Monitor Design to Measure Data Structure-Specific Cache Eviction Information
In this paper, we propose a hardware performance monitor that provides support not only for measuring cache misses and the addresses associated with them, but also for determining...
Bryan R. Buck, Jeffrey K. Hollingsworth
ASPLOS
2008
ACM
15 years 6 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
CGF
2010
148views more  CGF 2010»
15 years 4 months ago
Hardware-Assisted Projected Tetrahedra
We present a flexible and highly efficient hardware-assisted volume renderer grounded on the original Projected Tetrahedra (PT) algorithm. Unlike recent similar approaches, our me...
André Maximo, Ricardo Marroquim, Ricardo C....